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RISC-V
The Open-Standard Instruction Set Architecture
- 4.8k followers
- Zurich, CH
- https://riscv.org
- @risc_v
- info@riscv.org
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- riscv-event-trace Public
Extension to the RISC-V Trace standards which is user-configurable to trace a hardware-filtered subset of instructions
riscv/riscv-event-trace’s past year of commit activity - riscv-unified-db Public
Monorepo containing a machine-readable database of the RISC-V specification and artifact generation tools
riscv/riscv-unified-db’s past year of commit activity - riscv-arch-test Public
The RISC-V Architectural Certification Tests (ACTs) are a set of assembly language tests designed to certify that a design faithfully implements the RISC-V specification.
riscv/riscv-arch-test’s past year of commit activity - riscv-performance-event-sampling Public
Define 2 new extensions to, along with Zihpm and Sscofpmf, enable event and instruction sampling with precise attribution.
riscv/riscv-performance-event-sampling’s past year of commit activity - riscv-cfi Public
This specification is integrated into the Priv. and Unpriv. specifications. This repo is no longer maintained. Please refer to the Priv. and Unpriv. specifications at https://github.com/riscv/riscv-isa-manual
riscv/riscv-cfi’s past year of commit activity
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